Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey

In the modern-day era of technology, a paradigm shift has been witnessed in the areas involving applications of Artificial Intelligence (AI), Machine Learning (ML), and Deep Learning (DL). Specifically, Deep Neural Networks (DNNs) have emerged as a popular field of interest in most AI applications such as computer vision, image and video processing, robotics, etc. In the context of developed digital technologies and the availability of authentic data and data handling infrastructure, DNNs have been a credible choice for solving more complex real-life problems. The performance and accuracy of a DNN is a way better than human intelligence in certain situations. However, it is noteworthy that the DNN is computationally too cumbersome in terms of the resources and time to handle these computations. Furthermore, general-purpose architectures like CPUs have issues in handling such computationally intensive algorithms. Therefore, a lot of interest and efforts have been invested by the research fraternity in specialized hardware architectures such as Graphics Processing Unit (GPU), Field Programmable Gate Array (FPGA), Application Specific Integrated Circuit (ASIC), and Coarse Grained Reconfigurable Array (CGRA) in the context of effective implementation of computationally intensive algorithms. This paper brings forward the various research works carried out on the development and deployment of DNNs using the aforementioned specialized hardware architectures and embedded AI accelerators. The review discusses the detailed description of the specialized hardware-based accelerators used in the training and/or inference of DNN. A comparative study based on factors like power, area, and throughput, is also made on the various accelerators discussed. Finally, future research and development directions are discussed, such as future trends in DNN implementation on specialized hardware accelerators. This review article is intended to serve as a guide for hardware architectures for accelerating and improving the effectiveness of deep learning research.publishedVersio

Localization of multi-class on-road and aerial targets using mmwave FMCW radar

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Unified Quality-Aware Compression and Pulse-Respiration Rates Estimation Framework for Reducing Energy Consumption and False Alarms of Wearable PPG Monitoring Devices

Due to the high demands of tiny, compact, lightweight, and low-cost photoplethysmogram (PPG) monitoring devices, these devices are resource-constrained including limited battery power. Consequently, it highly demands frequent charge or battery replacement in the case of continuous PPG sensing and transmission. Further, PPG signals are often severely corrupted under ambulatory and exercise recording conditions, leading to frequent false alarms. In this paper, we propose a unified quality-aware compression and pulse-respiration rates estimation framework for reducing energy consumption and false alarms of wearable and edge PPG monitoring devices by exploring predictive coding techniques for jointly performing signal quality assessment (SQA), data compression and pulse rate (PR) and respiration rate (RR) estimation without the use of different domains of signal processing techniques that can be achieved by using the features extracted from the smoothed prediction error signal. By using the five standard PPG databases, the performance of the proposed unified framework is evaluated in terms of compression ratio (CR), mean absolute error (MAE), false alarm reduction rate (FARR), processing time (PT) and energy saving (ES). The compression, PR, RR estimation, and SQA results are compared with the existing methods and results of uncompressed PPG signals with sampling rates of 125 Hz and 25 Hz. The proposed unified qualityaware framework achieves an average CR of 4%, SQA (Se of 92.00%, FARR of 84.87%), PR (MAE: 0.46 ±1.20) and RR (MAE: 1.75 (0.65-4.45), PT (sec) of 15.34 ±0.01) and ES of 70.28% which outperforms the results of uncompressed PPG signal with a sampling rate of 125 Hz. Arduino Due computing platformbased implementation demonstrates the real-time feasibility of the proposed unified quality-aware PRRR estimation and data compression and transmission framework on the limited computational resources. Thus, it has great potential in improving energy-efficiency and trustworthiness of wearable and edge PPG monitoring devices.publishedVersio

Noise-aware dictionary-learning-based sparse representation framework for detection and removal of single and combined noises from ECG signal

Automatic electrocardiogram (ECG) signal enhancement has become a crucial pre-processing step in most ECG signal analysis applications. In this Letter, the authors propose an automated noise-aware dictionary learning-based generalised ECG signal enhancement framework which can automatically learn the dictionaries based on the ECG noise type for effective representation of ECG signal and noises, and can reduce the computational load of sparse representation-based ECG enhancement system. The proposed framework consists of noise detection and identification, noise-aware dictionary learning, sparse signal decomposition and reconstruction. The noise detection and identification is performed based on the moving average filter, first-order difference, and temporal features such as number of turning points, maximum absolute amplitude, zerocrossings, and autocorrelation features. The representation dictionary is learned based on the type of noise identified in the previous stage. The proposed framework is evaluated using noise-free and noisy ECG signals. Results demonstrate that the proposed method can significantly reduce computational load as compared with conventional dictionary learning-based ECG denoising approaches. Further, comparative results show that the method outperforms existing methods in automatically removing noises such as baseline wanders, power-line interference, muscle artefacts and their combinations without distorting the morphological content of local waves of ECG signal

Spectrum Sensing Implementations for Software Defined Radio in Simulink

The lack of spectrum for communication and for research is a bottleneck as far as technology and business development is considered. It is a fact that the availability of useful spectrum is limited by hardware constraints. The studies conducted by the Federal Communications Commission found that that there are many areas of the radio spectrum which are not fully utilized in different geographical areas of the country and FCC recommended locating and utilizing these unused spectrum spaces by other users. This is where spectrum sensing comes into use. From then on different spectrum sensing algorithms were developed. The paper implements four of those major sensing spectrum algorithms in MATLAB-Simulink and also does a performance comparison among them

Localization of multi-class on-road and aerial targets using mmwave FMCW radar

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